MAX1098CEAE+【PDF 4/20 页】IC ADC 10BIT SERIAL 16-SSOP

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Sheet目录2007

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MAX1098/MAX1099

10-Bit Serial-Output Temperature Sensors

with 5-Channel ADC

______________________________________________________________________________________

Converter Operation

Figure 2 shows a simplified model of the converter

input structure. Once initiated, a voltage conversion

requires 64 fCLK periods, where fCLK is the internal

master clock. Each conversion is preceded by 13 fCLK

periods of warm-up time, performed in twelve 4 fCLK

period cycles, and followed by three fCLK periods to

load the output register. SSTRB falls at the beginning of

a conversion and rises at the end of a conversion.

Inputs IN+ and IN- charge capacitors CHOLDP and

CHOLDN, respectively, during the acquisition interval

that occurs during the first fCLK period of the first con-

version cycle. In the second fCLK period, the T/H

switches open so that charge is retained on CHOLDP

and CHOLDN as a sample of the differential voltage

between IN+ and IN-. This charge is transferred to the

ADC during the third and fourth fCLK periods.

The reference sampling process begins in the second

conversion cycle and continues until the conversion is

complete. Sampling occurs during the second and

fourth fCLK periods to yield an effective doubling of the

reference voltage. The reference sampling requirement

is signal dependent and may or may not occur in every

subsequent conversion cycle.

Temperature conversion is nothing more than subtract-

ing the results of two sequential voltage conversions. The

only difference is that output registers are not loaded at

the end of the first conversion. Thus, temperature con-

versions require 2 x 64 - 3 = 125 fCLK periods. Figures

3a and 3b show timing diagrams for voltage and tem-

perature conversions, respectively.

Track/Hold

The T/H stage for the MAX1098/MAX1099 is a simple

switched-capacitor sampling operation. The time

required for the T/H stage to acquire an input signal is

a function of how fast its input capacitance is charged.

If the signal source impedance is high, the acquisition

time lengthens and more time must be allowed

between conversions. The acquisition time (tACQ) is the

maximum time the device takes to acquire the signal.

Calculate this with the following equation:

tACQ = 7 (Rs + RIN) CIN

where Rs is the source impedance of the input signal,

RIN is the T/H input impedance (40k

), and CIN is the

TIMING/CONTROL

LOGIC

FULLY

DIFFERENTIAL

A/D

OUTPUT

GAIN

OF 2

IN+

IN-

REF

TRACK AND HOLD

CHOLDP

4pF

CHOLDN

4pF

CREF

4pF

30k

RIN

40k

RIN

40k

T/H

Figure 2. Converter Input Structure

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